One type of high-speed data transmission interface that may be part of an integrated circuit is a Low Voltage Differential Signaling (“LVDS”) interface. LVDS interfaces are well-known, and accordingly are not described in unnecessary detail herein. However, two important parameters of an LVDS interface are output differential voltage (“Vod”) and output offset voltage (“Vos”). Vod is the voltage difference or swing voltage at two output terminals of an LVDS output driver. Vos is the average level of the voltage (or an offset voltage) at the two output voltage terminals. Vod and Vos can vary significantly due to variation in one or more of a semiconductor manufacturing process, supply voltage, and operating temperature, namely one or more variations in “PVT.”
In order to provide an LVDS interface which is more stable with respect to one or more variations in PVT, others have suggested using a current mirror circuit as part of a corner bias circuit. An example of a current mirror corner bias circuit implementation is described in additional detail in a co-pending patent application entitled “Apparatus and Method for Low Current Differential Swing I/O Interface” by Shi-dong Zhou et al., assigned application Ser. No. 11/089,848, filed Mar. 24, 2005. In brief, in that implementation, a resistor is coupled between an input port of a differential amplifier and ground, and another input to the differential amplifier is a reference Vos. Thus, any amplified difference from the differential amplifier is dependent in part upon such resistor. This resistor is used to provide a base current, and the base current is provided to added current mirror circuitry, excluding any current mirroring done in input/output reference cells (“I/O dummy cells”). Moreover, the output of the differential amplifier is provided to this current mirror circuitry. However, because the resistor is conventionally formed using polycrystalline silicon sheet resistance (“a polyresistor”), it is subject to significant variation due to one or more changes in PVT. Furthermore, current mirrors may not completely mirror a current, and thus the current may not be completely mirrored for input into reference input/output drivers. Furthermore, polyresistor-induced error caused by one or more variations in PVT is mirrored, and potentially amplified, by such current mirror. Thus, a current mirror implementation for a standard LVDS interface with a target Vod of approximately 350 mV and a target Vos of approximately 1.25 V may have a Vod ranging from approximately 240 to 460 mV and a Vos ranging from approximately 1.24 V to 1.26 V. Notably, the percentage of Vod variation may be significant, which may impact reliability of such an LVDS interface.
Accordingly, it would be desirable and useful to provide an LVDS interface with a Vod that is less subject to PVT variation than the above-described LVDS interface and thus has a narrower Vod range.